In the simplest implementation, magnetic random access memory (MRAM) cells comprise at least a magnetic tunnel junction formed of two magnetic layers separated by a thin insulating layer, where one of the layer, the so-called reference layer, is characterized by a fixed magnetization and the second layer, the so-called storage layer, is characterized by a magnetization which direction can be changed upon writing of the memory. When the respective magnetizations of the reference layers and the storage layer are antiparallel, the resistance of the magnetic tunnel junction is high, corresponding to a low logic state “0”. On the other hand, when the respective magnetizations are parallel, the resistance of the magnetic tunnel junction becomes low, corresponding to a high logic state “1”. The logic state of the MRAM cell is read by comparing its resistance state to a reference resistance, preferably derived from a reference cell or an array of reference cells, with a reference resistance, combined in-between the magnetic tunnel junction resistance of the high logic state “1” and the resistance of the low logic state “0”.
In an implementation of the MRAM cell using a thermally assisted switching (TAS) procedure, for example as described in U.S. Pat. No. 6,950,335, the storage layer is also exchange biased to an adjacent antiferromagnetic storage layer having a storage blocking temperature (the temperature at which the exchange bias of the antiferromagnetic storage layer vanishes) is lower than that a reference blocking temperature of an antiferromagnetic reference layer pinning the reference layer. Below the storage blocking temperature, the storage layer is difficult and/or impossible to write. Writing is then performed by heating the magnetic tunnel junction above the storage blocking temperature but below the reference blocking temperature. This is preferably performed by sending a heating current through the magnetic tunnel junction in order to free the magnetization of the storage layer, while simultaneously applying means of switching the magnetization of the storage layer. The latter can be switched by a magnetic field generated by a field current. The magnetic tunnel junction is then cooled down below the storage blocking temperature, where the storage layer magnetization is “frozen” in the written direction.
The magnetic field magnitude required to switch the magnetization direction of the storage layer is proportional to the coercivity of the storage layer. At small feature size, critical diameter distribution, shape variability and roughness of the edge surface of the magnetic tunnel junction lead to an increase of coercive field and an increase of coercive field distribution. Sensitivity to the distribution of dot shape is reduced when reducing the effective magnetization of the storage layer, which can be made by means of a specific kind of storage layer called “Synthetic Antiferromagnet”, in which effective magnetization is reduced. However, such reduction of effective magnetization comes at the cost of a higher coercive field.
EP2276034 concerns a magnetic random access memory cell containing a magnetic tunnel junction formed from an insulating layer comprised between a sense layer and a storage layer. The present disclosure also concerns a method for writing and reading the memory cell comprising, during a write operation, switching a magnetization direction of said storage layer to write data to said storage layer and, during a read operation, aligning magnetization direction of said sense layer in a first aligned direction and comparing said write data with said first aligned direction by measuring a first resistance value of said magnetic tunnel junction. The disclosed memory cell and method allow for performing the write and read operations with low power consumption and an increased speed.
US20070278547 discloses an MRAM bit which includes a free magnetic region, a fixed magnetic region comprising an antiferromagnetic material, and a tunneling barrier comprising a dielectric layer positioned between the free magnetic region and the fixed magnetic region. The MRAM bit avoids a pinning layer by comprising a fixed magnetic region exhibiting a well-defined high flop field using a combination of high uniaxial anisotropy, high saturation field, and ideal soft magnetic properties exhibiting well-defined easy and hard axes.